Various switching power supply circuits are widely known including, for example, a switching power supply circuit of the flyback converter type or the forward converter type. The switching converters of the types mentioned are restricted in suppression of switching noise because the switching operation waveform is a rectangular waveform. Further, it is known that the switching converters are limited in enhancement in the power conversion efficiency from their operation characteristics.
Therefore, various switching power supply circuits which rely upon various resonance type converters have been proposed by the applicant of the present application. According to the resonance type converters, a high power conversion efficiency can be obtained readily, and low noise is achieved because the switching operation waveform is a sine waveform. Further, the resonance type converters have a merit also that they can be formed from a comparatively small number of parts.
One of the power supply circuits having been applied for patent formerly by the applicant of the present invention is configured such that it includes a voltage resonance type converter as a primary side switching converter and produces and outputs a plurality of secondary side DC output voltages on the secondary side.
Further, for the stabilization of the secondary side DC output voltages, a switching frequency control method which depends upon control of the switching frequency of the primary side switching converter is adopted, for example, with regard to a main one of the primary side DC output voltages. Meanwhile, with regard to another required one of the secondary side DC output voltages, a controlled winding of an orthogonal type control transformer (saturable reactor) is inserted in series to a rectification current path for producing the secondary side DC output voltage. Further, the level of control current to be supplied to a controlling winding of the orthogonal type control transformer is varied in response to the level of the secondary side DC output voltage to vary the inductance of the controlled winding thereby to control the level of current to be supplied to the rectification current path to make the secondary side DC output voltage constant (refer to the official gazette of Japanese Patent Laid-Open No. 2000-064981).
A power supply circuit as a prior art which is formed based on the power supply circuit described above is shown in FIG. 14. Also the power supply circuit shown in FIG. 14 is configured such that it includes a resonance type converter as a primary side switching converter and a plurality of secondary side DC output voltages are produced on the secondary side. However, while the primary side switching converter in the power supply circuit described above is a voltage resonance type converter, that of the power supply circuit shown in FIG. 14 is a current resonance type converter. For example, while the rectification circuit system for producing secondary side DC output voltages adopts a configuration as a half-rectification circuit where the primary side switching converter is a voltage resonance type converter, where the primary side switching converter is a current resonance type converter, it is possible to form a full-wave rectification circuit as the rectification circuit system. This can increase the current capacity as the switching power supply circuit.
In the power supply circuit shown in FIG. 14, a common mode noise filter formed from one common mode choke coil CMC and two across capacitors CL is connected to a commercial AC power supply AC. The common mode noise filter suppresses noise to be transmitted, for example, from the switching converter side to the commercial AC power supply AC.
Further, a full-wave rectification circuit formed from a bridge rectification circuit Di and a smoothing capacitor Ci is provided in the line of the commercial AC power supply AC at the next stage to the common mode noise filter. A rectification smoothed voltage Ei having a level equal to that of an AC input voltage VAC is obtained as a voltage across the smoothing capacitor Ci by rectification smoothing operation by the full wave rectification circuit.
A switching converter which receives and operates with the rectification smoothed voltage Ei as a DC input voltage in this instance has a configuration as a composite resonance type converter which includes at least a partial voltage resonance circuit on the primary side in a basic configuration as a current resonance type converter.
Here, two switching devices Q1 (high side) and Q2 (low side) each formed from a MOS-FET are connected to each other in a half bridge coupling scheme as seen in FIG. 14. Damper diodes DD1 and DD2 are individually connected in parallel to each other and in such directions as seen in FIG. 14 between the drain-source of the switching devices Q1 and Q2, respectively.
Further, a partial resonance capacitor Cp is connected in parallel between the drain-source of the switching device Q2. A parallel resonance circuit (partial voltage resonance circuit) is formed from the capacitance of the partial resonance capacitor Cp and the leakage inductance L1 of a primary winding N1. The partial voltage resonance circuit performs partial voltage resonance operation wherein it voltage resonates only upon turning off of the switching devices Q1 and Q2.
A control IC 2 includes an oscillation circuit for driving the current resonance type converter in a separately excited fashion, a control circuit, a protection circuit and so forth and is formed as an analog IC (Integrated Circuit) for universal use including a bipolar transistor in the inside thereof.
The control IC 2 operates with a DC voltage inputted to a power supply input terminal Vcc. In this instance, the power supply input terminal Vcc is connected to the line of the rectification smoothed voltage Ei through a starting resistor Rs. The control IC2 is started by and operates with the rectification smoothed voltage Ei inputted thereto through the starting resistor Rs. Further, the control IC 2 is grounded to the primary side ground through a ground terminal E.
Further, the control IC 2 includes two drive signal output terminals VGH and VGL as terminals for outputting a drive signal (gate signal) to the switching elements.
A drive signal for switching driving the high side switching element is outputted from the drive signal output terminal VGH, and another drive signal for switching driving the low side switching element is outputted from the drive signal output terminal VGL.
The high side drive signal outputted from the drive signal output terminal VGH is applied to the gate of the switching element Q1. Meanwhile, the low side drive signal outputted from the drive signal output terminal VGL is applied to the gate of the switching element Q2.
The switching elements Q1 and Q2 perform switching operation such that they are alternately switched on/off with a required switching frequency by the drive signals outputted from the drive signal output terminals VGH and VGL, respectively.
An insulating converter transformer PIT transmits switching outputs of the switching elements Q1 and Q2 to the secondary side and in this instance has a primary winding N1 and two secondary windings N2 and N2A wound thereon.
In this instance, the primary winding N1 of the insulating converter transformer PIT is connected at one end thereof to a node (switching output point) between the source of the switching element Q1 and the drain of the switching element Q2 through a series connection of a series resonance capacitor C1. The primary winding N1 is connected at the other end thereof to the primary side ground.
According to the connection scheme described above, a series circuit of the series resonance capacitor C1 and the primary winding N1 is connected to the switching output point of the switching elements Q1 and Q2. Consequently, a primary side series resonance circuit is formed from the capacitance of the series resonance capacitor C1 and a leakage inductance L1 of the insulating converter transformer PIT including the primary winding N1. Since the primary side series resonance circuit is connected to the switching output point in such a manner as described above, the switching output of the switching elements Q1 and Q2 is transmitted to the primary side series resonance circuit. The primary side series resonance circuit performs resonance operation in response to the switching output transmitted thereto. Consequently, operation of the primary side switching converter becomes that of the current resonance type.
Accordingly, operation of the current resonance type by the primary side series resonance circuit (C1-L1) and partial resonance operation by the partial voltage resonance circuit (Cp//L1) described hereinabove are obtained by the primary side switching converter shown in FIG. 14.
In other words, the power supply circuit shown in FIG. 14 adopts a form which includes a combination of a resonance circuit for making the primary side switching converter that of the resonance type with another resonance circuit. In short, the power supply circuit adopts a configuration as a composite resonance type converter
An alternating voltage is induced in each of the secondary windings N2 and N2A wound on the secondary side of the insulating converter transformer PIT in response to the switching output transmitted to the primary winding N1.
The secondary winding N2 has a center tap provided thereon as shown in FIG. 14 and connected to the secondary side ground, and a full-wave rectification circuit formed from rectification diodes Do1 and Do2 and a smoothing capacitor Co is connected to the secondary winding N2. Consequently, a secondary side DC output voltage Eo is obtained as a voltage across the smoothing capacitor Co. The secondary side DC output voltage Eo is supplied to the load side not shown and is branched and inputted also as a detection voltage for a control circuit 1 described below.
The control circuit 1 produces a voltage or current whose level is adjusted in response to the level of the secondary side DC output voltage Eo described hereinabove as a control output thereto. The control output is outputted to a control terminal Vc of the control IC 2.
The control IC 2 operates to adjust the frequency of the drive signals in response to the control output level inputted to the control terminal Vc to adjust the frequency of the drive signal for the high side and the drive signal for the low side to be outputted from the drive signal output terminals VGH and VGL while the drive signals maintain the timings at which they are turned on/off alternately.
Consequently, the switching frequency of the switching elements Q1 and Q2 is variably controlled in response to the control output level (that is, the secondary side DC output voltage level) inputted to the control terminal Vc.
When the switching frequency varies, the resonance impedance of the primary side series resonance circuit varies. When the resonance impedance varies, the amount of current to be supplied to the primary winding N1 of the primary side series resonance circuit varies and also the power to be transmitted to the secondary side varies. Consequently, the level of the secondary side DC output voltage Eo varies, and constant voltage control for the secondary side DC output voltage Eo is implemented.
In this instance, a step-down type converter formed from a switching element Q3 formed from a MOS-FE, a rectification diode D3, a choke coil L10, and a smoothing capacitor Co3 in such a manner as seen in FIG. 14 is connected to the secondary side output voltage Eo.
The step-down type converter produces a secondary side DC output voltage Eo2 stepped down from the secondary side DC output voltage Eo by receiving the secondary side DC output voltage Eo as an input thereto and half-wave rectifying an alternating voltage obtained by switching performed by the switching element Q3 by means of the rectification diode D3 and the choke coil L10 to charge the smoothing capacitor Co3.
The constant voltage control of the secondary side DC output voltage Eo2 is performed by a control circuit 3.
The control circuit 3 receives the secondary side DC output voltage Eo2 as an input thereto and, for example, varies the pulse width within one cycle of a drive signal to be outputted to the gate of the switching element Q3 in response to the level of the secondary side DC output voltage Eo2 inputted thereto while controlling the switching frequency constant. In other words, the control circuit 3 preforms PWM control. Consequently, the on-angle of the switching element Q3 within one switching cycle is varied, and as a result, also the level of the secondary side DC output voltage Eo2 varies. By variably controlling the secondary side DC output voltage Eo2 in this manner, stabilization of the secondary side DC output voltage Eo2 is achieved.
Further, a center tap is provided also for the secondary winding N2A and connected to the secondary side ground, and besides, a full-wave rectification circuit is formed from rectification diodes Do3 and Do4 and a smoothing capacitor Co1 in such a manner as seen in FIG. 15. A DC voltage is obtained across the smoothing capacitor Co1.
In this instance, a three-terminal regulator 4 is connected to the DC voltage of an output of the smoothing capacitor Co1 so that a stabilized secondary side DC output voltage Eo1 is obtained as a voltage across the smoothing capacitor Co2.
Here, the load conditions with regard to the secondary side DC output voltages Eo, Eo1 and Eo2 obtained on the secondary side in such a manner as described above are such as given below:Eo: 5.0 V/6 A to 2 AEo1: 12.0 V/1 A to 0.2 AEo2: 3.3 V/6 A to 2 A
According to the load conditions given above, the highest load power is applied to the secondary side DC output voltage Eo. Therefore, the constant voltage control of the secondary side DC output voltage Eo is performed using switching frequency control which has the highest controlling capability and provides comparatively low power loss.
The second highest load power next to the secondary side DC output voltage Eo is applied to the secondary side DC output voltage Eo2. Since the load current amount is considerably great also with regard to the secondary side DC output voltage Eo2, in this instance, a step-down type converter is provided as means other than the switching frequency control to achieve a constant voltage.
The remaining secondary side DC output voltage Eo1 is stabilized by simple and easy means by the three-terminal regulator 4 since the load current amount is small.
However, the power supply circuit described hereinabove with reference to FIG. 14 has the following problems.
While the DC/DC power conversion efficiency (η DC/DC) of the power supply circuit shown in FIG. 14 is 94% with regard to the secondary side DC output voltage Eo, it is 80% with regard to the secondary side DC output voltage Eo1 and 92% with regard to the secondary side DC output voltage Eo2, and is totally approximately 88%.
In particular, while the circuit shown in FIG. 14 adopts a configuration wherein a series regulator such as the three-terminal regulator 4 and a step-down type converter are added in order to individually stabilize a plurality of secondary side DC output voltages, the series regulator and the step-down type converter inevitably exhibit high power loss. Therefore, where the load power variation is great as a condition of the load side, the power loss further increases, and consequently, also it becomes necessary to provide a heat radiating plate for the series regulator and/or the step-down type converter, which gives rise to, for example, expansion of the circuit scale and/or increase of the cost.
Further, in the power supply circuit shown in FIG. 14, while the switching frequency of the primary side composite resonance type converter is 75 KHz to 100 KHz, the switching frequency of the switching element Q3 in the step-down type converter on the secondary side is fixed, for example, at 100 KHz. Where a plurality of switching frequencies are involved in one power supply circuit in this manner, the switching frequencies interfere with each other and also the level of noise generation becomes higher. Therefore, such a countermeasure against noise such as various types of noise filters or shield plates is required, and also in this regard, expansion of the circuit scale and increase of the cost are invited.
Therefore, it is known to adopt a magnetic amplifier as means for stabilizing the secondary side outputs in place of such a series regulator and a step-down type converter as described above.
FIG. 15 shows an example of a configuration where the secondary side of the power supply circuit shown in FIG. 14 adopts such a magnetic amplifier as described above. It is to be noted that like elements those of FIG. 14 are denoted by like reference characters and description of them is omitted herein.
Referring to FIG. 15, a circuit system for producing the stabilized secondary side DC output voltage Eo1 is configured in the following manner.
First, the secondary winding N2A has a center tap provided thereon and connected to the secondary side ground, and the rectification diodes Do3 and Do4 and the smoothing capacitor Co1 are connected to the secondary winding N2A in such a manner as seen in FIG. 15 to form a full-wave rectification circuit. Thus, the secondary side DC output voltage Eo1 is produced as a voltage across the smoothing capacitor Co1.
In addition, the full-wave rectification circuit of the secondary winding N2A includes a constant voltage circuit (magnetic amplifier constant voltage circuit) which includes a magnetic amplifier, and the secondary side DC output voltage Eo1 is stabilized by the magnetic amplifier constant voltage circuit.
The magnetic amplifier constant voltage circuit includes a saturable inductor (choke coil) SR1 interposed between an end of the secondary winding N2A and the anode of the rectification diode Do3 and another saturable inductor SR2 interposed between the other end of the secondary winding N2A and the anode of the rectification diode Do4. Further, the cathode of a reset voltage adjusting diode DV1 is connected to the anode of the rectification diode Do3, and the cathode of another reset voltage adjusting diode DV2 is connected to the anode of the rectification diode Do4. The anodes of the diodes DV1 and DV2 are connected to the collector of the transistor Q4. The emitter of the transistor Q4 is connected to the positive line for the secondary side DC output voltage Eo1 through a resistor Rc.
The control circuit 3 in this instance controls the magnetic fluxes of the saturable inductors SR1 and SR2 in order to stabilize the secondary side DC output voltage Eo1.
The control circuit 3 is formed as an error amplifier including shunt regulator and so forth and variably controls the base current level of the transistor Q4 in response to the level of the secondary side DC output voltage Eo1 inputted thereto. The collector current level of the transistor Q4 is adjusted by the variable control of the base current level of the transistor Q4. Since the collector of the transistor Q4 is connected to a node between the anodes of the reset voltage adjusting diodes DV1 and DV2, when the collector current level is adjusted, the control voltage for adjusting the reset voltage for the magnetic fluxes of the saturable inductors SR1 and SR2 is adjusted.
Here, the saturable inductor SR (SR1, SR2) is formed by winding a winding Ln of a solid wire by a required number of turns on a circular toroidal core CR, for example, in such a manner as seen in FIG. 16.
FIG. 17 illustrates a B-H diagram where a cobalt type amorphous material is selected as a material of the core of the saturable inductor SR formed in such a manner as described above. The B-H characteristic of the saturable inductor SR exhibits a hysteresis characteristic having a high rectangular ratio as can be seen from the figure.
The magnetic amplifier including such a saturable inductor SR as described above operates in such a manner as seen in FIG. 18. Referring to FIG. 18, the voltage V3 represents a potential between the node between the saturable inductor SR1 and the secondary winding N2A and the center tap of the secondary winding N2A. Meanwhile, the voltage VL1 indicates a voltage across the saturable inductor SR1. The current ID1 represents rectification current flowing to the rectification diode Do3.
Within a period from t0 to t1, the voltage V3 exhibits a state of the positive polarity, and at this time, the saturable inductor SR1 is in an unsaturated state (B0>B>B1). At this time, since the relationship between the voltages V3 and VL1 is V3≈VL1, the current ID1 does not flow to the rectification diode Do3.
Within another period from t1 to t2, since the saturable inductor SR1 exhibits a saturated state (B=B1), the voltage VL1 has the substantially 0 level. Consequently, since the relationship between the voltages V3 and VL1 is V3>VL1, the current ID1 begins to flow to the rectification diode Do3.
Then within a further period from t2 to t3, an output voltage adjustment circuit 11 shown equivalently in FIG. 19 operates. This output voltage adjustment circuit 11 is, in FIG. 15, a control circuit 3 to which the secondary side DC output voltage Eo2 is inputted. As can be seen also from FIG. 19, the control circuit 3 adopts a configuration as an error amplifier. In short, the control circuit 3 compares the level of the secondary side DC output voltage Eo2 divided by the voltage dividing resistors Ro1 and Ro2 with a reference voltage Vref and amplifies an error between them by means of an amplifier formed from an operational amplifier OP and a feedback circuit (Ca, Ra), and then outputs the amplified error through a resistor Rb.
Then, a reset circuit 10 supplies reset current to the saturable inductor SR1 in response to the output from the output voltage adjustment circuit 11 obtained in such a manner as described above. The reset circuit 10 equivalently indicates a function as the reset circuit formed from the resistor Rc, transistor Q4, diodes DV1 and DV2 and saturable inductors SR1 and SR2 shown in FIG. 15.
Supplying operation of reset current by the reset circuit 10 at this time is performed by supplying current of a level corresponding to the output level from the output voltage adjustment circuit 11 to the saturable inductor SR1 through the resistor Rc→transistor Q4→diode DV1. By the reset current, resetting of the saturable inductor SR1 is performed so that the magnetic flux density may be returned to B0.
The time length of the period from t0 to t1 in which the saturable inductor SR1 has an unsaturated state is determined by the reset amount (reset current level) within the period from t2 to t3.
Therefore, the reset amount is increased in response to a rise of the level of the secondary side DC output voltage Eo1 as the tendency to a lighter load increases. Consequently, since the remaining magnetic flux density B0 becomes B0A as seen in FIG. 17, also the period from t0 to t1 which is a period of the unsaturated state can be increased so as to become a period from t0A to t1A as seen in FIG. 18. As the period of the unsaturated state increases in this manner, also the period within which the current ID1 does not flow increases, and consequently, also the power supply period to the load per unit time decreases and also the level of the secondary side DC output voltage Eo1 drops as much.
Then, such operation as described above is performed also on the saturable inductor SR2 side but at a timing at which the waveform illustrated in FIG. 18 exhibits a phase difference of 180°.
In this manner, the circuit shown in FIG. 15 achieves stabilization of the secondary side DC output voltage Eo1 obtained by full-wave rectification.
Further, in FIG. 15, also for the secondary side DC output voltage Eo2 produced on the secondary winding N2 side, a configuration wherein constant voltage control is performed by a magnetic amplifier constant voltage circuit is adopted similarly for the secondary side DC output voltage Eo1 described above.
In short, as a basic configuration for obtaining the secondary side DC output voltage Eo2, a full-wave rectification circuit formed from rectification diodes Do5 and Do6 and a smoothing capacitor Co1 is connected to the secondary winding N2.
In addition, saturable inductors (choke coils) SR3 and SR4, the diodes DV1 and DV2 for reset voltage adjustment, the transistor Q3 for reset current outputting, the resistor Rc and a control circuit 3 are connected to the full-wave rectification circuit in such a manner as seen in FIG. 15 to form a magnetic amplifier constant voltage circuit.
Where such a magnetic amplifier constant voltage circuit as described hereinabove with reference to FIG. 15 is adopted, the constant voltage control by the magnetic amplifier constant voltage circuit is of the type wherein the periods within which the saturable inductor SR exhibits saturated/unsaturated states. This operation is performed in accordance with cyclic timings of the voltage V3 obtained in the secondary winding as can be recognized from the foregoing description. In other words, operations of the saturable inductor SR, reset voltage adjusting diodes DV1 and DV2, and reset current outputting transistors Q3 and Q4, which form the magnetic amplifier constant voltage circuit are held in synchronism with the switching frequency of the primary side switching converter. From this, the problem of increase of the generation amount of noise by interference between different switching frequencies as in the case of, for example, the power supply circuit shown in FIG. 14 is eliminated.
However, also in the circuit shown in FIG. 15, the power loss by the toroidal core CR which forms the saturable inductor SR and the power loss by semiconductor elements such as the reset voltage adjusting diodes DV1 and DV2 and the reset current outputting transistors Q3 and Q4 which form the magnetic amplifier constant voltage circuit are high. Consequently, the problem that the total power conversion efficiency of the power supply circuit drops remains. For example, the total power conversion efficiency (η DC/DC) where, for example, the circuit shown in FIG. 15 is used is approximately 86% and is lower than that by the circuit configuration shown in FIG. 14.
Further, in order to form the magnetic amplifier constant voltage circuit, a toroidal core as the saturable inductor SR and semiconductor elements such as diode elements for reset voltage adjustment and transistors for reset current outputting are required. For example, in an actual case, a Schottky diode is selectively used for the diode elements for reset voltage adjustment. Meanwhile, a transistor for 50 V/2 A is selectively used for the transistors for the reset current outputting. Since the semiconductor elements mentioned are comparatively expensive, the circuit shown in FIG. 15 is still disadvantageous in terms of the cost.
This problem is significant particularly where the configuration of the power supply circuit shown in FIG. 14 is used as a basic configuration. In particular, as described hereinabove, where a current resonance type configuration is used as the basic configuration of the primary side switching converter, the rectification circuit system for producing a secondary side DC output voltage can be formed as a full-wave rectification circuit thereby to achieve a configuration by which a greater current capacity can be obtained. However, if it is tried to add a magnetic amplifier constant voltage circuit to a full-wave rectification circuit, then two sets each including a saturable inductor SR and a diode element for reset voltage adjustment are required corresponding to positive/negative rectification current paths.
In this manner, where constant voltage control is performed individually for a plurality of secondary side DC output voltages produced on the secondary side by a switching power circuit which includes, for example, a current resonance type converter on the primary side, the problems of drop of the power conversion efficiency, increase of the cost and so forth caused by addition of the circuit elements for the constant voltage control are involved.